am Kunal, I am passionate about contributing to the society by creating new knowledge and to find interesting solutions to some existing problems in computer science. I enjoy long conversations on topics related to technology and philosophy.

Short Biography 

Currently, I am a researcher (postdoc) working in a joint lab comprising of the S2ET lab at ESTACA and the LECS lab at CEA LIST. Previously, I was a part of the LIDEO lab at CEA LIST, where I completed my research work to obtain a PhD in computer science. This PhD was prepared under the supervision of professors from Telecom SudParis and was fully funded by CEA Paris-Saclay. During this PhD, I was enrolled at the doctoral school of the University of Paris-Saclay.

Detailed Biography 

Since Feb. 2019, I am a researcher (postdoc) at a joint lab comprising of the following:

  • The "Systèmes et Energie Embarqués pour les Transports" (S2ET) lab, which is located at ESTACA. This lab comprises of researchers from ESTACA, which is a French engineering school that specializes in the domain of  aeronautics, automotive, and transportation technology
  • The "Laboratory of Systems Requirements and Conformity Engineering" (LECS) at CEA LIST (Paris-Saclay campus). CEA LIST is an institute focused on integration of systems & technology within the CEA Paris-Saclay.

During 2016-2019, I completed my PhD research work in computer science at the University of Paris-Saclay (French: Université Paris-Saclay). This PhD was supervised by professors from Telecom SudParis (TSP) and was fully funded by the LIST institute (Laboratory for Integration of Systems and Technology) within the French Alternative Energies and Atomic EnergyCommission, Paris-Saclay (French: Commissariat à l’énergie atomique et aux énergies alternatives (CEA)).  During this PhD, I was a part of the "Executable Language Engineering and Optimization Laboratory" (LIDEO) at CEA LIST.  Furthermore, as a part of  TSP, I belonged to the SAMOVAR  lab (UMR 5157), which has researchers working on various domains in computer science. TSP belongs to Institut Mines Télécom (IMT) and is a prestigious French public engineering school (French: Grande école d'ingénieurs) in the field of information and communication technology (ICT)  and telecommunications.  Moreover, both CEA Paris-Saclay and TSP are the founding members of Université Paris-SaclayThus, I was enrolled at the doctoral school of University Paris-Saclay. At CEA LIST, our team works towards various open source technology supported by EclipseThe LIDEO lab works on developing the Papyrus framework, which is well known and extensively used for model-driven engineering (MDE) in both industry and academia.

Before starting my PhD, I worked as a research engineer (2013-2015) at the Xerox Research Centre Europe (XRCE), France (acquired by Naver Labs Europe since 2017). During my time at XRCE, I was involved in developing research prototypes in context of data-driven intelligence in Business Process Management (BPM) domain. I also authored several patent applications on integrating BPM & AI domain with collaborations from researchers at XRCE.

During 2011-2013, I completed a joint masters program in European Union (EU) at universities in Germany, Greece, the Netherlands each. This masters was fully funded by the EU under the prestigious Erasmus Mundus scholarship program. I hold an MSc (2013) in computer science from the University of Stuttgart, Germany and an MSc (2013) in Information Management from the Tilburg University, the Netherlands.   

My research interests are in AI, Data Science, Internet of Things (IoT), and Business Process Management (BPM).

Industry Experience


Organization, Place


Feb. 2019 - till now

S2ET Lab
 ESTACA Paris-Saclay
CEA LIST Paris-Saclay

Postdoctoral Researcher

Jan. 2016 – Feb. 2019

CEA LIST Paris-Saclay, France

Junior Researcher/ PhD candidate

Jan. 2016 – Feb. 2019


Junior Researcher/ PhD candidate

Oct. 2013 – Dec. 2015

Grenoble, France

Research Engineer

Feb. 2013 – Aug. 2013

Grenoble, France

Research  Intern

Jan. 2011 – June 2011

Delhi-NCR, India

Pre-release Program Associate

Aug. 2008 – Dec. 2010

Bangalore, India

Assistant Systems Engineer/ Software Engineer



 University, Country

Academic Degree

Jan. 2016 – Feb. 2019

Université Paris-Saclay
Paris, France

PhD in Computer Science

Aug. 2011 – Aug. 2013

University of Stuttgart, Stuttgart, Germany

MSc in Computer Science

Aug. 2012 – Aug. 2013

Tilburg University
Tilburg, Netherlands

MSc in Information Management

Aug. 2011 – Aug. 2013

University of Crete
Crete, Greece

July 2004 – Aug. 2008

VIT University
Vellore, India

B.Tech in Computer Science

Last updated: 14th February 2019